Design, Implementation and Verification of a Deserializer Module for a SerDes Mixed Signal System on Chip in 130 nm CMOS Technology /
Αποθηκεύτηκε σε:
| Κύριος συγγραφέας: | |
|---|---|
| Μορφή: | Thesis Βιβλίο |
| Γλώσσα: | Αγγλικά |
| Θέματα: | |
| Διαθέσιμο Online: | Ver documento en línea |
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Παρόμοια τεκμήρια: Design, Implementation and Verification of a Deserializer Module for a SerDes Mixed Signal System on Chip in 130 nm CMOS Technology /
- Test Modules Design for a SerDes Chip in 130nm CMOS Technology /
- Design and Integration of a Deserializer Module for a SerDes Mixed Signal System on Chip /
- Serializer Design for a SerDes Chip in 130nm CMOS Technology /
- Design of the Analog Transmitter Module in 130 nm CMOS Technology /
- Digital Serializer Design for a SerDes Chip in 130nm CMOS Technology /
- Design and Physical Implementation of an Analog Receiver for a SerDes System on Chip in 130nm CMOS Technology /