Kanavat - Diseño de recuperador de datos y reloj adaptivo a jitter / :: Biblioteca ITESO

Samankaltaisia teoksia: Diseño de recuperador de datos y reloj adaptivo a jitter /

Pikavilkaisu
Diseño e implementación de divisor de frecuencia e integración del SoC CDR adaptativo a jitter con LFSR para pruebas y PLL interno con tecnología BiCMOS de 130 nm /
Pikavilkaisu
Nanometer CMOS ICs : From Basics to ASICs /
Pikavilkaisu
CMOS Digital Integrated Circuits : Analysis and Design /
Pikavilkaisu
Analysis and Design of Analog Integrated Circuits /
Pikavilkaisu
Analysis and Design of Analog Integrated Circuits /
Pikavilkaisu
CMOS IC Layout : Concepts, Methodologies, and Tools /
Pikavilkaisu
CMOS : Mixed Signal Circuit Design /
Pikavilkaisu
Analog MOS Integrated Circuits /
Pikavilkaisu
Design of Bias Circuit for Charge Pump in 130nm BiCMOS Technology /
Pikavilkaisu
Design for Testability in a SerDes System /
Pikavilkaisu
Diseño del path de alta frecuencia del receptor analógico del SerDes ITESOTV1 /
Pikavilkaisu
Serializer Design for a SerDes Chip in 130nm CMOS Technology /
Pikavilkaisu
Test Module Design for ITESO TV1 SerDes /
Pikavilkaisu
Test Modules Design for a SerDes Chip in 130nm CMOS Technology /
Pikavilkaisu
Design and Integration of a Deserializer Module for a SerDes Mixed Signal System on Chip /
Pikavilkaisu
Design, Implementation and Verification of a Deserializer Module for a SerDes Mixed Signal System on Chip in 130 nm CMOS Technology /
Pikavilkaisu
Diseño de módulo serializador de un sistema SerDes para protocolo de comunicación PCI Express /
Pikavilkaisu
Large Scale Integrated Circuits Technology : State of the Art and Prospect /
Pikavilkaisu
Fundamentals of Modern VLSI Devices /
Pikavilkaisu
The Art of Analog Layout /
Pikavilkaisu
The Art of Analog Layout /
Pikavilkaisu
A 0.18um CMOS Time Amplifier for a Low Power SAR-ADC with Adaptive Conversion Cycle oriented to Audio Applications /
Pikavilkaisu
A 0.18um CMOS linear Voltage-to-Time Converter for a Low Power 10-bit 200kS/s SAR ADC with Adaptive Conversion Cycle Oriented to Audio Applications /
Pikavilkaisu
Implementing a TSPC D Flip Flop as an Arbiter for a low power 10-bits 200kS/s ADC with Adaptive Conversion Cycle for High-Quality Audio Applications in 0.18um TSMC CMOS Technology /

Aihe: Transistores MOS

Aihe: Circuitos de Tiempo - Tema Principal

Tekijä: García Hernández, Néstor Damián

Pikavilkaisu
Diseño de recuperador de datos y reloj adaptivo a jitter /

© 2026 Catálogo Público de la Biblioteca V/F -- v.11.0