Implementing a TSPC D Flip Flop as an Arbiter for a low power 10-bits 200kS/s ADC with Adaptive Conversion Cycle for High-Quality Audio Applications in 0.18um TSMC CMOS Technology /

Ejemplares similares

• A 0.18um CMOS linear Voltage-to-Time Converter for a Low Power 10-bit 200kS/s SAR ADC with Adaptive Conversion Cycle Oriented to Audio Applications /
  por: Figueroa Vázquez, Cristian F.
  Publicado: (2020)
• A 0.18um CMOS Time Amplifier for a Low Power SAR-ADC with Adaptive Conversion Cycle oriented to Audio Applications /
  por: Hernandez Flores, Jaime Guadalupe
  Publicado: (2020)
• BandGap Reference Voltage and Serial Communication Module for a Low Power 10 Bits SAR ADC to Biomedical Applications /
  por: González Ornelas, Luis Angel
  Publicado: (2021)
• Successive Approximation Register and Digital to Analog Converter for a 10- Bit Low Power SAR ADC for Biomedical Applications /
  por: Garza Pérez, Raymundo
  Publicado: (2021)
• Optimization of a TSPC D Flip-Flop Using MatLab /
  por: Martínez Flores, Iván
  Publicado: (2025)