Design for Testability in a SerDes System /
Gorde:
| Egile nagusia: | |
|---|---|
| Formatua: | Tesis Liburua |
| Hizkuntza: | ingelesa |
| Argitaratua: |
Guadalajara, México :
edición de autor,
2017
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| Gaiak: | |
| Sarrera elektronikoa: | Ver documento en línea |
| Etiketak: |
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Antzeko izenburuak: Design for Testability in a SerDes System /
- Test Module Design for ITESO TV1 SerDes /
- Serializer Design for a SerDes Chip in 130nm CMOS Technology /
- Test Modules Design for a SerDes Chip in 130nm CMOS Technology /
- Design and Integration of a Deserializer Module for a SerDes Mixed Signal System on Chip /
- Design, Implementation and Verification of a Deserializer Module for a SerDes Mixed Signal System on Chip in 130 nm CMOS Technology /
- Diseño de módulo serializador de un sistema SerDes para protocolo de comunicación PCI Express /