Designing Network on-Chip Architectures in the Nanoscale Era /
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| Andre forfattere: | |
| Format: | Bog |
| Sprog: | engelsk |
| Udgivet: |
Boca Ratón, EUA :
Chapman and Hall : CRC Press,
2011, c2011
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| Serier: | (Chapman and Hall/CRC Computational Science Series)
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| 001 | 000335947 | ||
| 005 | 20250521000000.0 | ||
| 009 | 20260310114245.749 | ||
| 020 | |a 978-1-4398-3710-8 | ||
| 037 | |a Acervo ITESO - Biblioteca | ||
| 041 | |a ING | ||
| 082 | |a 621. 391 |b FLI | ||
| 100 | |a Flich, José |e (ed.) | ||
| 245 | 1 | 0 | |a Designing Network on-Chip Architectures in the Nanoscale Era / |c Ed. de J. Flich, D. Bertozzi ; pról. de Luca Benini. |
| 264 | 4 | |a Boca Ratón, EUA : |b Chapman and Hall : |b CRC Press, |c 2011, c2011 | |
| 300 | |a XXXVIII, 490 p. | ||
| 336 | |a texto |b txt |2 rdacontenido | ||
| 337 | |a sin mediación |b n |2 rdamedio | ||
| 338 | |a volumen |b nc |2 rdasoporte | ||
| 440 | 1 | |a (Chapman and Hall/CRC Computational Science Series) | |
| 649 | |a XX | ||
| 650 | |a Redes en un Chip - |x Diseño y Construcción - |x Tema Principal | ||
| 650 | |a Circuitos Integrados - |x Diseño y Construcción | ||
| 650 | |a Sistemas Embebidos | ||
| 650 | |a Sistemas Computacionales | ||
| 650 | |a Nanotecnología | ||
| 650 | |a Microelectrónica | ||
| 650 | |a Ingeniería Computacional | ||
| 650 | |a Ingeniería Electrónica | ||
| 700 | |a Bertozzi, Davide |e (edición) | ||
| 910 | |a Fondo General | ||
| 920 | |a Impresos - Libros | ||
| 930 | |a Colección General | ||
| 905 | |a 101 | ||
| 901 | |a 0500225687 |b IT1 |c ACC |i C138403 |u 20250521 | ||
| 902 | |a https://opac.biblio.iteso.mx/vufind/Record/000335947 | ||