CMOS : Circuit Design, Layout, and Simulation /
Tallennettuna:
| Päätekijä: | |
|---|---|
| Aineistotyyppi: | Kirja |
| Kieli: | englanti |
| Julkaistu: |
Nueva York, EUA :
IEEE : Wiley,
2005, c2005
|
| Painos: | 2a edición |
| Sarja: | (IEEE Press Series on Microelectronics Systems)
|
| Aiheet: | |
| Tagit: |
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|
MARC
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| 082 | |a 621. 39732 |b BAK | ||
| 100 | |a Baker, R. Jacob |e (autor) | ||
| 240 | 1 | 1 | |a [CMOS: Circuit Design, Layout, and Simulation] |
| 245 | 1 | 0 | |a CMOS : |b Circuit Design, Layout, and Simulation / |c R.J. Baker. |
| 250 | |a 2a edición | ||
| 264 | 4 | |a Nueva York, EUA : |b IEEE : |b Wiley, |c 2005, c2005 | |
| 300 | |a XXXIII, 1038 p. | ||
| 336 | |a texto |b txt |2 rdacontenido | ||
| 337 | |a sin mediación |b n |2 rdamedio | ||
| 338 | |a volumen |b nc |2 rdasoporte | ||
| 440 | 1 | |a (IEEE Press Series on Microelectronics Systems) | |
| 649 | |a XX | ||
| 650 | |a Transistores MOS - |x Diseño y Construcción | ||
| 650 | |a CMOS (Electrónica) - |x Tema Principal | ||
| 650 | |a Circuitos Integrados - |x Diseño y Construcción | ||
| 650 | |a Métodos de Simulación | ||
| 650 | |a Electrónica Digital | ||
| 650 | |a Ingeniería Electrónica | ||
| 910 | |a Fondo General | ||
| 920 | |a Impresos - Libros | ||
| 930 | |a Colección General | ||
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