On-Chip ESD Protection for Integrated Circuits : An IC Design Perspective /
I tiakina i:
| Kaituhi matua: | |
|---|---|
| Hōputu: | Pukapuka |
| Reo: | Ingarihi |
| I whakaputaina: |
Boston, EUA :
Kluwer,
2002, c2002
|
| Rangatū: | (The Kluwer International Series in Engineering and Computer Science ;
663) |
| Ngā marau: | |
| Ngā Tūtohu: |
Kāore He Tūtohu, Me noho koe te mea tuatahi ki te tūtohu i tēnei pūkete!
|
| Tau karanga: |
621. 3815 WAN
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|---|---|---|---|
| Ejemplar 0500082945 |
Disponible
Préstamo 7 días a 90
|
Kohinga:
Colección General
|
Ngā tuhipoka:
Ubicar en Nivel 2 Norte Área de Colección General
|