Cita APA (7th ed.)
Thomas, D. E. Logic Design and Verification Using SystemVerilog. CreateSpace.
Cita Chicago (17th ed.)
Thomas, Donald E. Logic Design and Verification Using SystemVerilog. EUA: CreateSpace.
Cita MLA (9th ed.)
Thomas, Donald E. Logic Design and Verification Using SystemVerilog. CreateSpace.
Atenció: Aquestes cites poden no estar 100% correctes.