Cita APA (7a ed.)
Sutherland, S., Davidmann, S., Flake, P., & Moorby, P. R. SystemVerilog for Design: A Guide to Using SystemVerilog for Hardware Design and Modeling. Springer.
Cita estilo Chicago (17a ed.)
Sutherland, Stuart, Simon Davidmann, Peter Flake, y Philip R. Moorby. SystemVerilog for Design: A Guide to Using SystemVerilog for Hardware Design and Modeling. Nueva York, EUA: Springer.
Cita MLA (9a ed.)
Sutherland, Stuart, et al. SystemVerilog for Design: A Guide to Using SystemVerilog for Hardware Design and Modeling. Springer.
Precaución: Estas citas no son 100% exactas.